Hierarchical Synchronous Reconfigurable Array which is part of the BRASS Project University of California at Berkeley via a google search.
They figured out that long interconnects are a problem when you're trying to get speed out of a logic array, but don't seem to be willing to give up the big complex interconnection logic.
I'd call this a step closer to the bit grid, but definitely not a hit.
1 comment:
Hi,
I didn't know where to send you a message so i thought I'll just write it here. Even though
As a student in electrical-engineering i find your concept of bitgrids very interesting. I see a few theoretical problems there, though.
The first is that higher level languages to program the bitgrids are essential, as it seems very hard to implement todays common algorithms in the bitgrid. Common CPU's have machine code that better resembles our mathematical methods and algorithms, and our human linear way of thinking. For the britgrid to work efficiently it has to be very parallel. Even FPGAs and such work in a rather linear way, with maybe a few parallel (but individually linear) lines. Although they also usually are programmed in higher languages such as VHDL.
The Second, and more imporant problem seems to be Turing completeness(see wikipedia). Can that be guaranteed for a bitgrid?
From what I can read in your blog the bitgrids seem to have a lot in common with cellular automata (again, interesting read on wikipedia). Conways Game of Life seems to be very easy to implement on a bitgrid. Anyway.. I would look there for theory on the computational side of bitgrids. I don't think a lot of research has been done about usable computing with cellular automata. And that would be the first, hardest and most important step on making them and bitgrids useful.
Hope I could help,
Alex
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